Engineering Approaches to Biomolecular Motors

Engineering Approaches to Biomolecular Motors: From in vitro to in vivo Poster Abstracts

31-POS Board 31 Computase: Computing with a Self-assembling 3D Lattice of De Novo Designed Biomolecular Machines Kathy Y. Wei , David Baker. University of Washington, Seattle, WA, USA. Although silicon-based computers continue to improve, alternative models of computation have the potential to supply more energy-efficient and parallelized solutions to domains difficult for sequential instruction-based semi-conductor computers. While traditional computers require energy to hold the state of each transistor, proteins will only require energy to change state. We propose a protein-based computer that self assembles into a 3D cubic lattice of nodes. Each node is a computationally designed 3-input/3-output protein logic gate “wired” to its 6 lattice neighbors. The connectedness allows computing processes to be parallel - throughout the volume of the assembled lattice - and be scalable. For example, the proposed protein computer could process an image by taking one pixel per node along an entire face of the lattice and thus process an entire image simultaneously, as opposed to sequentially on traditional computers. Physically, each node is composed of two components: a scaffold to support self-assembly, and a molecular machine that integrates and transfers information between lattice neighbors. We have demonstrated the ability to build multicomponent self-assembling nanostructures and 2D protein arrays, and to design de novo proteins with atomic accuracy. As a first step, we will design bistable protein switches that can 1) toggle between two states, and 2) toggle in such a way as to influence the states of neighboring nodes. The protein design goals of 3D self-assembly, bistable switches, and directed protein-protein information transfer are important next steps addressable with computational protein design. Protein-based 3D lattice computers bear great potential for the future of energy efficient parallel computing.

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